Various processes for forming a resist pattern on a surface of a substrate are known. The substrate has a thickness which recently tends to be thinner. The thinner substrate makes handling more difficult. Patent Document 1 (JP 2015-142026, A) suggests an electrostatic-stick carrier that electrostatically sticks the substrate thereon for ease of handling. In this case, while the substrate is stuck on the electrostatic-stick carrier, several following steps including formation of a resist layer, exposure, and development.
On the other hand, in the technical field for etching the substrate within a plasma atmosphere, Patent Document 2 (JP 2016-048715, A) suggests that after forming the resist pattern on the substrate, the substrate is held on a tape supported by a frame by adhering the substrate and the frame on the tape.
However, when forming the resist pattern, the electrostatic-stick carrier likely causes the several steps on the sucked substrate complicated. Also, the electrostatic-stick carrier requires a substantial cost to be applied in a mass-production process of the elemental chips.
In the meanwhile, when etching the substrate within the plasma atmosphere, it is much easier to handle the substrate if the substrate could be held on the adhering or holding tape before forming the resist pattern on the substrate. However, in order to form the resist pattern, after application of a resist solution on the side of the substrate by means of a spin-coating process, a coating layer before exposure is required to be baked (or heated) at a temperature of, for example, 90 degrees Celsius. The solvent remains in the coating layer more than permissible range at the lower baking temperature, which substantially degrades an accuracy of the resist patterning. However, on the other hand, when the coating layer is baked at a temperature high enough to form the resist patterning, the adhering or holding tape having low heat-resistant temperature deteriorates so that the inherent functions thereof cannot be achieved any more.